Semiconductor device and portable apparatus and electronic apparatus comprising the same

ABSTRACT

A method of fabricating a lead frame for a semiconductor device. The lead frame has a lead electrically connected to a semiconductor chip within sealing resin and sealed into the sealing resin such that at least a part of its lower surface is exposed from a lower surface of the sealing resin. The method includes a punching step for forming the lead by punching processing in a direction from the lower surface to its upper surface and a coining step for subjecting the lead to coining processing from the side of the upper surface after the punching processing.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method of fabricating a lead framefor a semiconductor device fabricated by resin-sealing a semiconductorchip and a method of fabricating a semiconductor device using the same,and such a semiconductor device and a portable apparatus and anelectronic apparatus comprising the same.

2. Description of Related Art

In order to high-density mount a semiconductor device on a wiringsubstrate, a package for high-density mounting allowing surface-mountingon the wiring substrate by eliminating extension of a lead from a moldresin package and exposing a lead (a terminal portion electricallyconnected to a semiconductor chip) of a lead frame to a lower surface ofthe package has been conventionally used. Known as such a package forhigh-density mounting have been leadless packages such as QFN (Quad FlatNon-leaded Package) and SON (Small Outlined Non-leaded Package).

In the packages in these forms, a lower surface of the lead sealed withmold resin, together with the semiconductor chip, is exposed to thelower surface of the package, so that the lead easily slips off the moldresin. Therefore, the lead can be prevented from slipping off by formingthe lead into a reverse-tapered shape as disclosed in U.S. Pat. No.6,664,133, rough-surfacing an upper surface of the lead as disclosed inJapanese Unexamined Patent Publication (KOKAI) No. 2003-158234, orproviding an offset in a part of the lead as disclosed in U.S. Pat. No.6,700,189.

In order to form the lead having such a cross-sectional shape, the leadframe has been conventionally processed by etching. However, a long timeis required for the processing, and the cost is increased. Therefore,the fabrication of the lead frame using a precision press mold (die) hasbeen recently proposed, as disclosed in U.S. Pat. No. 6,664,133, forexample.

In the method disclosed in U.S. Pat. No. 6,664,133, the lead frame isfabricated by subjecting a metal plate serving as a material for thelead frame to punching processing and pressing processing using a punchfrom the side of a lower surface of the lead frame, and stepped shapesfor slipping prevention are respectively formed at a front end and aside surface of the lead.

In the case of the punching processing from the side of the lowersurface of the lead frame, however, a sag occurs at a side edge on thelower surface of the lead so that the lead has a semi-round shape incross section. The sag cannot be eliminated even by forming the steppedshape corresponding to the side surface of the lead by the subsequentpressing processing, so that the lower surface of the lead forms acurved surface projected downward.

When the lead frame, together with the semiconductor chip, isresin-sealed, therefore, the sealing resin may detour toward the lowersurface of the lead to cover a part of the lower surface of the leadwhich should function as an outer lead. This results in inferior contactand defective products.

This problem can be solved by performing first punching processing fromthe side of an upper surface of the lead frame. In such a method,however, a burr projects toward the lower surface of the lead, whichstill causes the defective products.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a method of fabricatinga lead frame capable of preventing sealing resin from detouring toward alower surface of a lead, and a method of fabricating a semiconductordevice using the same.

Another object of the present invention is to provide a semiconductordevice comprising a lead frame capable of preventing sealing resin fromdetouring toward a lower surface of a lead.

Still another object of the present invention is to provide a portableapparatus comprising the above-mentioned semiconductor device.

A further object of the present invention is to provide an electronicapparatus comprising the above-mentioned semiconductor device.

A method of fabricating a lead frame according to the present inventionis for fabricating a lead frame having a lead electrically connected toa semiconductor chip within sealing resin and sealed into the sealingresin such that at least a part of its lower surface is exposed from alower surface of the sealing resin. The method comprises a punching stepfor forming the lead by punching processing in a direction from thelower surface (an exposed surface exposed from the sealing resin) to itsupper surface (a sealed surface sealed into the sealing resin); and acoining step for subjecting the lead to coining processing (e.g.,coining processing of not less than 20 μm) from the side of the uppersurface after the punching processing.

According to this method, the lead is formed by punching a hole in ametal plate as a material for the lead frame from the side of the lowersurface (a surface exposed to a lower surface of a package of thesemiconductor device in the final form). At this time, a sag occurs at aside edge on the lower surface of the lead, and the lower surface of thelead forms a curved surface projected downward. Thereafter by subjectingthe lead to the coining processing from the side of the upper surface,however, the lower surface of the lead can be made flat. Consequently,the sag on the lower surface of the lead can be eliminated. Inresin-sealing the lead frame, together with the semiconductor chip,therefore, the lower surface of the lead is not covered with the sealingresin, thereby making it possible to reduce the number of defectiveproducts.

Although the lower surface of the lead can be also made. flat by thecoining processing from the side of the lower surface, the lower surfaceof the lead is offset upward from the other portion of the lead frame.Therefore, the sealing resin may detour toward the lower surface of thelead.

The coining processing is performed, for example, by opposing the lowersurface of the lead to a die having a flat surface and pressing theupper surface of the lead using a punch.

It is preferable that the coining processing step is the step ofsubjecting almost all of the whole area of the lead to the coiningprocessing, and is the step of subjecting at least an area correspondingto a portion (an outer lead), which will be exposed to the lower surfaceof the sealing resin, in the lead to the coining processing.

It is preferable that the method further comprises a front end lowersurface coining step for subjecting a front end of the lead (whichrefers to a front end nearer to the semiconductor chip after the resinsealing or a front end, in a case where there is a support forsupporting the semiconductor chip, nearer to the support) to the coiningprocessing from the side of the lower surface after the punchingprocessing.

According to this method, the lower surface at the front end of the leadis subjected to the coining processing. Therefore, the lower surface atthe front end of the lead is offset upward from the lower surface of theother portion of the lead, to form a front end slipping preventingportion. Consequently, the sealing resin detours below the lower surfaceat the front end of the lead, thereby making it possible to prevent thelead from slipping off the sealing resin.

The front end lower surface coining step may be carried out before thecoining step for the lead.

It is preferable that the method further comprises a side edge shapingstep for shaping a side edge of the lead from the side of the lowersurface by a metal mold after the punching processing.

According to this method, the side edge on the lower surface of the leadis shaped from the side of the lower surface, so that the exposedportion (outer lead) exposed from the lower surface of the sealing resin(a package) of the semiconductor device can be formed in a desiredshape, size, and arrangement. Consequently, the inferior connection ofthe semiconductor device can be prevented, thereby allowing thereliability thereof to be enhanced.

In shaping the side edge on the lower surface of the lead from the sideof the lower surface, a space beside the lead is opened, unlike that inpunching a hole in the metal plate, so that a portion receiving apressing force from the metal mold (a punch) is coined while beingenlarged sideward. Therefore, in this step, no substantial sag occurs atthe side edge on the lower surface of the lead.

The side edge shaping step may be carried out after the coiningprocessing step.

The side edge shaping step may be the step of forming a side surfaceslipping preventing portion sticking out to the side surface of the leadsimultaneously by shaping from the side of the lower surface at the sideedge of the lead. The side surface slipping preventing portion is offsetupward from the lower surface of the lead (outer lead), so that thesealing resin detours below the lower surface. This allows the lead fromslipping off.

The lead may have a longitudinal shape. In this case, it is preferablethat the method further comprises the step of forming a notch in agroove shape along a direction crossing the longitudinal direction ofthe lead on the upper surface of the lead by metal mold processing.According to this method, the sealing resin enters the notch in a grooveshape, thereby making it possible to prevent the lead from slipping offtoward the longitudinal direction.

A method of fabricating a semiconductor device according to the presentinvention comprises the steps of fabricating a lead frame in theabove-mentioned manner; electrically connecting the upper surface of thelead and the semiconductor chip; resin-sealing the lead frame, togetherwith the semiconductor chip, such that at least a part of the lowersurface of the lead is exposed from the lower surface; and cutting awayan unnecessary part of the lead frame.

A semiconductor device according to the present invention is asemiconductor device having a semiconductor chip resin-sealed thereinto,comprising; the above-mentioned semiconductor chip; a lead frame havinga lead electrically connected to the semiconductor chip within sealingresin and sealed into the sealing resin such that at least a part of itslower surface is exposed from a lower surface of the sealing resin and asupport for mounting the semiconductor chip, the lower surface of thelead being a substantially flat surface, and a difference of elevationdue to coining processing from the side of the upper surface of the leadoccurring between the upper surface of the lead and an upper surface ofthe support; and the sealing resin for sealing the lead frame and thesemiconductor chip such that the lower surface of the lead is exposed.

It is preferable that the plate thickness of the lead is smaller thanthe plate thickness of the support by the coining processing from theside of the upper surface of the lead. According to this configuration,as a result of the coining processing from the side of the upper surfaceof the lead, the plate thickness of the lead becomes smaller than theplate thickness of the support.

It is preferable that a plating layer for electrical connection to thesemiconductor chip (e.g., a plating layer for wire bonding) is formed onthe upper surface of the lead. This configuration allows the reliabilityof the electrical connection between the semiconductor chip and the leadto be enhanced.

It is preferable that the plating layer, together with the lead, issubjected to the coining processing (e.g., coining processing of notless than 20 μm) from the side of the upper surface of the lead.

In the case of this configuration, the lead is subjected to the coiningprocessing from the side of the upper surface after the plating layer isformed on the lead. Consequently, plating processing and processing forremoving an unnecessary part of the plating layer can be performed in astate where no step occurs on the upper surface of the lead, therebymaking it easy to form the plating layer on the upper surface of thelead.

As a result of performing the coining processing from the side of theupper surface of the lead after forming the plating layer, a flaw causedby the coining processing is usually formed on the surface of theplating layer.

A portable apparatus according to the present invention comprises theabove-mentioned semiconductor device. The semiconductor device can bemade thin, and the reliability of the electrical connection to thewiring substrate is high. Therefore, the semiconductor device cancontribute to miniaturization and thinning of the portable apparatusincorporating the same, and the reliability thereof can be improved.

An electronic apparatus according to the present invention comprises awiring substrate, the above-mentioned semiconductor devicesurface-mounted on the wiring substrate by joining the lead thereto, anda case accommodating the wiring substrate on which the semiconductordevice is mounted. The electronic apparatus having such a configurationcan be made small and thin, and can have superior reliability.

Examples of the portable apparatus and the electronic apparatus includea portable telephone set, a PDA (Personal Digital Assistant), and anotebook-type personal computer.

The foregoing and other objects, features, aspects and advantages of thepresent invention will become more apparent from the followingdescription of the preferred embodiments of the present invention whentaken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view showing the configuration of a lead frameaccording to an embodiment of the present invention;

FIG. 2 is an illustrative sectional view showing the configuration of asemiconductor device having the lead frame incorporated therein;

FIG. 3 (a) is a front view as viewed from a front end of a lead, FIG. 3(b) is a bottom view thereof, and FIG. 3 (c) is a side view thereof;

FIG. 4 is a conceptual diagram for explaining the configuration of aprecision press device used for fabricating the lead frame;

FIGS. 5 (a) to 5 (e) are illustrative sectional views for explaining theconfiguration of each of press stations in the precision press device;

FIGS. 6 (a) to 6 (d) are diagrams for explaining a change in the shapeof a lead in a lead frame fabricating step; and

FIG. 7 is an illustrative perspective view showing the configuration ofa punch for front end lower surface coining processing.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 is a plan view showing the configuration of a lead frameaccording to an embodiment of the present invention. FIG. 1 illustratesa unit portion corresponding to one semiconductor device. In practice,however, unit portions corresponding to a plurality of semiconductordevices are connected to one another in a left-to-right direction inFIG. 1, thereby constituting a band-shaped chain member as a whole.

The lead frame 10 is fabricated by subjecting a metal plate(particularly a copper plate, for example, having a plate thickness ofabout 200 μm) 100 to precision press processing. A unit portioncorresponding to one semiconductor device has a rectangular shape (anapproximately square shape in an example of FIG. 1), and has a support(an island) 1 for supporting a semiconductor chip at its center and hasa plurality of leads 2 arranged at approximately equal spacing so as toimaginarily form a rectangular shape around its periphery.

The support 1 has a substantially X shape as viewed from the top and iscoupled to a frame 5 connecting with the metal plate 100 through hangleads 4 at four corners of the imaginary rectangular shape formed by theplurality of leads 2 in the present embodiment. Each of the leads 2 hasa longitudinal shape arranged with its front end directed toward thecenter, and has its base end coupled to the frame 5. The plurality ofleads 2 arranged along each of the sides of the imaginary rectangularshape are substantially parallel to one another, and the longitudinaldirection thereof is along a direction nearly perpendicular to the side.Reference numerals 101, 102, and 103 are positioning holes forpositioning the lead frame 10 in a processing step in each of pressstations in a precision press device, a mounting step for mounting thesemiconductor chip, a sealing step for sealing with the sealing resin,and so on.

FIG. 2 is an illustrative sectional view showing the configuration of asemiconductor device having the above-mentioned lead frame 10incorporated therein. The semiconductor device comprises the lead frame10, a semiconductor chip 6 mounted on the support 1 in the lead frame10, a bonding wire 7 for electrically connecting the semiconductor chip6 and an upper surface 2 a of the lead 2, and sealing resin 8 forsealing them. A lower surface 2 b of the lead 2 is exposed from a lowersurface of the sealing resin 8, and functions as an outer lead to besoldered and joined to a wiring pattern on a circuit board. Further, aportion sealed into the sealing resin in the lead 2 functions as aninner lead, and a portion near to its front end is an inner connectingportion to which the bonding wire 7 is joined. A surface-mounting typesemiconductor package (QFN) is thus configured.

The semiconductor device is surface-mounted on a wiring substrate 91 bysoldering and joining the lower surface 2 b of the lead 2 thereto. Thewiring substrate 91 on which the semiconductor device is mounted isemployed, for example, in a state where it is accommodated within a case90 of a portable apparatus such as a portable telephone set.

In assembling the semiconductor device, the semiconductor chip 6 isdie-bonded to an upper surface of the support 1, and a terminal of thesemiconductor chip 6 and the upper surface 2 a of the lead 2 areconnected to each other by the bonding wire 7. Thereafter, a sealingarea 50 indicated by a two-dot and dash line in FIG. 1 is resin-sealed.Consequently, the semiconductor chip 6, the bonding wire 7, and the lead2 are resin-sealed to form a package. Thereafter, the lead 2 and thehang lead 4 are cut along a side surface of the package, and are cutaway from the frame 5. Respective pieces of the semiconductor device arethus obtained.

FIG. 3 (a) is a front view as viewed from the front end of the lead 2,FIG. 3 (b) is a bottom view thereof, and FIG. 3 (c) is a side viewthereof. The lead 2 is subjected to coining processing from the side ofthe upper surface 2 a of the lead 2 in its area leading to the front endfrom a position nearer to the base end with respect to a cutting line 51along which it is cut after being resin-sealed, the upper surface 2 a islower than the upper surfaces of the frame 5 and the support 1, and theplate thickness thereof (e.g., about 170 μm) in the area is smaller thanthe plate thicknesses of the frame 5 and the support 1 (e.g., less thanabout 200 μm) (also see FIG. 2). A notch 28 having an approximately Vshape in cross section is formed along a direction nearly perpendicularto the longitudinal direction of the lead 2 on the upper surface 2 a ofthe lead 2. The notch 28 prevents the lead 2 from slipping off thesealing resin 8 along the longitudinal direction.

On the upper surface 2 a of the lead 2, an area nearer to the front endof the lead 2 (nearer to the support 1) from the notch 28 functions as awiring connecting portion (an inner connecting portion) to which thebonding wire 7 is joined. A plating layer 29 (e.g., a silver platinglayer) for achieving good joining to the bonding wire 7 is formed in thewire connecting portion. On the other hand, the lower surface 2 b of thelead 2, together with the semiconductor chip 6, is resin-sealed and isthen exposed from the lower surface of the sealing resin 8, to functionas an outer connecting portion (an outer lead) for surface-mounting on acircuit board.

An area at the front end of the lead 2 is subjected to coiningprocessing from the side of the lower surface 2 b of the lead 2, and afront end slipping preventing portion 21 offset upward from the lowersurface 2 b of the lead 2 is formed. The front end slipping preventingportion 21 sticks out toward its front end and side surfaces in thevicinity of an upper surface of a main body 20 of the lead 2. In a statewhere the lead 2, together with the semiconductor chip 6, isresin-sealed, the sealing resin 8 detours below the front end slippingpreventing portion 21, thereby preventing the lead 2 from slipping off.

Slipping preventing steps 22 are formed over almost all of the areas onboth side surfaces of the main body 20 of the lead 2. The slippingpreventing steps 22 are formed so as to extend over an area leading tothe cutting line 51 from a position at a rear end (an edge at a baseend) of the front end slipping preventing portion 21 at an intermediateposition in the thickness direction of the main body 20. The slippingpreventing steps 22 stick out of both the side surfaces of the main body20, and its lower surface is offset upward from the lower surface 2 b ofthe lead 2. When the lead 2, together with the semiconductor chip 6, isresin-sealed, therefore, the sealing resin 8 detours below the slippingpreventing steps 22. Consequently, the lead 2 is prevented from slippingoff.

The slipping preventing step 22 is formed by being subjected to pressingprocessing using a metal mold (a punch) from the side of the lowersurface 2 b of the lead 2. Therefore, the lower surface 2 b has apredetermined size and shape, and lower surfaces 2 b of a plurality ofleads 2 have a desired arrangement. Consequently, the lower surfaces 2 bof the plurality of leads 2 satisfactorily function as an outerconnecting portion.

As shown in FIG. 3 (a), the lower surface 2 b of the lead 2 is asubstantially flat surface. If the lower surface of the lead frame 10 isresin-sealed by being pressed against the metal mold, therefore, thesealing resin does not detour below the lower surface 2 b, therebycausing no inferior conduction by attachment of the sealing resin 8.

FIG. 4 is a conceptual diagram for explaining the configuration of theprecision press apparatus used for fabricating the lead frame 10. Thelead frame 10 is conveyed in a forward direction (rightward in FIG. 4)successively through a plurality of (six in the example shown in FIG. 4)press stations S1 to S6. The press station S1 is a punching processingportion for subjecting the band-shaped metal plate 100 as a material topunching processing from the side of its lower surface. The pressstation S2 is a front end lower surface coining processing portion forsubjecting the front end of the lead 2 to coining processing from theside of the lower surface of the lead 2. The press station S3 is acutting processing portion for cutting the front end of the lead 2 at acutting position which is at a predetermined distance from the base endof the lead 2. The press station S4 is a coining processing portion forsubjecting the whole of the lead 2 to coining processing from the sideof the upper surface of the lead 2. The press station S5 is a sidesurface coining processing portion for shaping the lower surface 2 b ofthe lead 2 by coining processing from the side of both the side surfacesof the lead 2. The press station S6 is a notch formation processingportion for forming the V-shaped notch 28 in an intermediate part of theupper surface 2 a of the lead 2.

FIG. 5 (a) is an illustrative sectional view showing the configurationof the press station S1 (punching processing portion), showing a crosssection taken along a plane crossing the longitudinal direction of thelead 2. In the press station S1, the band-shaped metal plate 100 issubjected to punching processing from the side of the lower surface 100b. More specifically, the metal plate 100 is inserted between a die 61and a holding member 71 respectively having openings 61 a and 71 acorresponding to a pattern of the support 1, the lead 2, or the like. Inthis state, a punch 81 having a shape aligned with the openings 61 a and71 a passes through the openings 71 a and 61 a in this order such thatit makes a hole in the metal plate 100 in a direction from the lowersurface 100 b to its upper surface 100 a, and is then moved up and downsuch that it retreats from the openings 61 a and 71 a. Consequently, thesupport 1 and the lead 2 are formed by punching processing from thelower surface 2 b of the lead 2. At this time, a cross section crossingthe longitudinal direction of the lead 2 has a reverse semi-round shape,as shown in FIG. 6 (a). That is, the lower surface 2 b has a curvedsurface projected downward, and sags respectively occur at both theirside edges.

FIG. 5 (b) is an illustrative sectional view showing the configurationof the press station S2 (front end lower surface coining processingportion), showing a state as viewed from the side surface of the lead 2.In the press station S2, the front end slipping preventing portion 21 isformed by coining processing from the side of the lower surface at thefront end of the lead 2 obtained by punching processing. Morespecifically, a die 62 having a flat lower surface is arranged above thelead 2, and a holding member 72 is arranged below the metal plate 100. Apunch 82 is moved up and down with a predetermined stroke through anopening 72A formed in the holding member 72.

The punch 82 has a recess 82A in a rectangular shape as viewed from thetop formed in a width approximately equal to the width of the lead 2,and is overlapped with the front end of the lead 2 in an innermost partof the recess 82A, as shown in FIG. 7. Therefore, the front end of thelead 2 is coined and is offset upward from the lower surface 2 b of thelead 2, and a flared portion sticking out of the side surface of themain body 20 is formed at a position slightly nearer to the base end ofthe lead 2 from the offset portion. Consequently, the above-mentionedfront end slipping preventing portion 21 is formed.

The stroke of the punch 82 is so determined as to be lowered after anupper end of the punch 82 is moved to an intermediate portion of theplate thickness of the metal plate 100 (e.g., a position nearer to theupper surface from the intermediate position of the plate thickness).Therefore, the front end slipping preventing portion 21 sticks outtoward the front end and both the sides of the main body 20 at aposition near to the upper surface 2 a of the lead 2.

FIG. 6 (b) is a front view showing a state where the front end slippingpreventing portion 21 has been formed. At this time point, the main body20 of the lead 2 still has a reverse semi-round shape in cross section,and a sag occurs in the lower surface 2 b.

FIG. 5 (c) is an illustrative sectional view showing the configurationof the press station S4 (coining processing portion), showing a crosssection taken along a plane crossing the longitudinal direction of thelead 2. After the front end slipping preventing portion 21 is cut to apredetermined length in the press station S3, the entire lead 2 issubjected to coining processing in the press station S4. That is, in thepress station S4, a die 63 having a flat upper surface is arranged belowthe lead 2, and a holding member (not shown) for pressing portions,corresponding to the support 1 and the like, other than the lead 2 isarranged above the metal plate 100, as shown in FIG. 5 (c). The holdingmember is provided with an opening for exposing the entire lead 2, andis provided with a punch 83 having a flat lower surface so as to bemovable up and down through the opening. The punch 83 has a pressingsurface 83 a which can press the entire lead 2 (at least an areaincluding the entire area nearer to the front end with respect to thecutting line 51).

The up-and-down stroke of the punch 83 is so set that the position of alower dead point of the pressing surface 83 a is below (e.g., only 30 μmbelow) the upper surface 2 a of the lead 2 before the coiningprocessing. More specifically, the position of the lower dead point ofthe pressing surface 83 a is so determined that the lower surface 2 b ofthe lead 2 can be made substantially flat by eliminating the sag in thelower surface 2 b of the lead 2 before the coining processing.Consequently, the transverse section of the main body 20 after thecoining processing of the lead 2 becomes approximately rectangular, asshown in FIG. 6 (c).

FIG. 5 (d) is an illustrative sectional view showing the configurationof the press station S5 (side surface coining processing portion),showing a cross section taken along a plane crossing the longitudinaldirection of the lead 2. In the press station 5, a die 65 having a flatlower surface is arranged above the lead 2, and holding members 75respectively having openings 75 a wider than spacing between theadjacent leads 2 at corresponding positions between the adjacent leads 2are arranged below the lead 2. A punch 85 which moves up and downthrough the opening 75 a is arranged below the holding member 75. Thepunch 85 has a pressing surface 85A wider than the spacing between theadjacent leads 2 at its upper end.

The stroke of the punch 85 is so determined that the position of itsupper dead point is within the range of the plate thickness of the mainbody 20 of the lead 2 (e.g., an intermediate position of the platethickness, i.e., a position below the front end slipping preventingportion 21). Consequently, both side edges of the main body 20 of thelead 2 are pressed upward from the lower surface 2 b by moving the punch85 up and down, and the slipping preventing steps 22 are respectivelyformed at the intermediate position of the plate thickness of the mainbody 20 on both the side surfaces of the main body 20. The lower surface2 b of the main body 20 is correspondingly shaped to a width between theadjacent punches 85, to have a predetermined size, shape, andarrangement.

The transverse section of the main body 20 after the side surfacecoining processing is shown in FIG. 6 (d) . At the time of the sidesurface coining processing, a space beside the main body 20 of the lead2 is a free space, as shown in FIG. 5 (d); therefore, a portion coinedby the punch 85 easily spreads sideward. Therefore, the lower surface 2b after the processing is a substantially flat surface without causing asag at a side edge of the lower surface 2 b, unlike that in the case ofpunching processing.

FIG. 5 (e) is an illustrative sectional view showing the configurationof the press station S6 (notch formation processing portion), showing across section taken along a plane crossing the longitudinal direction ofthe lead 2. In the press station S6, a die 64 having a flat uppersurface is arranged below the lead 2, a holding member (not shown)having an opening in a slit shape (in a slit shape nearly perpendicularto the longitudinal direction of the lead 2) is arranged at anintermediate position in the longitudinal direction of the main body 20of the lead 2, and a plate-shaped punch 84 which moves through theopening is further provided. The punch 84 has a wedge-shaped pressingportion 84 a at its front end (lower end).

The up-and-down stroke of the punch 84 is so determined that the lowerend of the pressing portion 84 a reaches a position within the range ofthe plate thickness of the lead 2. Consequently, a notch 28 having a Vshape in cross section can be formed in an intermediate part in thelongitudinal direction of the lead 2 by moving the punch 84 up and down.

When the lead frame 10 is thus formed through the press stations S1 toS6, a wire connecting portion is subjected to plating processing (e.g.,silver plating processing).

The plating processing may be performed before the coining processing bythe press station S4. Consequently, the lead 2 is subjected to coiningprocessing from the side of the upper surface 2 a after the platinglayer 29 is formed on the upper surface 2 a. Consequently, platingprocessing and processing for removing an unnecessary part of theplating layer can be performed in a state where no step occurs on theupper surface 2 a of the lead 2, thereby making it easy to form theplating layer 29 on the upper surface 2 a of the lead 2. In this case,the plating layer 29 is also subjected to coining processing from theside of the upper surface, so that a flaw caused by the coiningprocessing is usually formed on the surface of the plating layer 29.

Although description has been made of an embodiment of the presentinvention, the present invention can also be embodied by anotherembodiment. Although in the above-mentioned embodiment, description hasbeen made of an example in which the lead 2 and the semiconductor chip 6are electrically connected to each other through the bonding wire, abump may be provided at a terminal portion of the semiconductor chip,and may be joined to the upper surface 2 a of the lead 2.

Although in the above-mentioned embodiment, in the step of processingthe metal plate 100 to fabricate the lead frame 10, processing by eachof the press stations S1 to S6 is performed in a state where the uppersurface of the lead frame 10 is directed upward and the lower surfacethereof is directed downward, the processing in each of the steps may beperformed in a state where the upper surface of the lead frame 10 isdirected downward and the lower surface thereof is directed upward. Inthis case, the vertical relationship among the punch, the holdingmember, and the die in each of the press stations S1 to S6 is preferablyreversed.

Although in the above-mentioned embodiment, a series of processing stepsfor fabricating the lead frame 10 is continuously performed by oneprecision press apparatus, some of the steps may be performed by anotherapparatus.

Although the present invention has been described and illustrated indetail, it is clearly understood that the same is by way of illustrationand example only and is not to be taken by way of limitation, the spiritand scope of the present invention being limited only by the terms ofthe appended claims.

The present application corresponds to Japanese Patent application No.2003-347415 filed with the Japanese Patent Office on Oct. 6, 2003, thedisclosure of which is herein by reference.

1-5. (canceled)
 6. A semiconductor device having a semiconductor chipresin-sealed thereinto, comprising: the semiconductor chip; a lead framehaving a lead electrically connected to the semiconductor chip withinsealing resin and a support for mounting the semiconductor chip, thelead being sealed into the sealing resin such that at least a part ofits lower surface is exposed from a lower surface of the sealing resin,the lower surface of the lead being a substantially flat surface, adifference of elevation due to coining processing from a side of anupper surface of the lead occurring between the upper surface of thelead and an upper surface of the support; and the sealing resin forsealing the lead frame and the semiconductor chip such that the lowersurface of the lead is exposed.
 7. The semiconductor device according toclaim 6, wherein plate thickness of the lead is smaller than platethickness of the support due to the coining processing from the side ofthe upper surface.
 8. The semiconductor device according to claim 6,wherein a plating layer for electrical connection to the semiconductorchip is formed on the upper surface of the lead.
 9. The semiconductordevice according to claim 8, wherein the plating layer, together withthe lead, has been subjected to the coining processing from the side ofthe upper surface of the lead.
 10. A portable apparatus comprising asemiconductor device having a semiconductor chip resin-sealed thereinto,wherein the semiconductor device comprises the semiconductor chip; alead frame having a lead electrically connected to the semiconductorchip within sealing resin and a support for mounting the semiconductorchip, the lead being sealed into the sealing resin such that at least apart of its lower surface is exposed from a lower surface of the sealingresin, the lower surface of the lead being a substantially flat surface,a difference of elevation due to coining processing from a side of anupper surface of the lead occurring between the upper surface of thelead and an upper surface of the support; and the sealing resin forsealing the lead frame and the semiconductor chip such that the lowersurface of the lead is exposed.
 11. An electronic apparatus comprising:a wiring substrate; a semiconductor device surface-mounted on the wiringsubstrate by joining a lead thereto; and a case accommodating the wiringsubstrate on which the semiconductor device is mounted, thesemiconductor device comprising the semiconductor chip, a lead framehaving a lead electrically connected to the semiconductor chip withinsealing resin and a support for mounting the semiconductor chip, thelead being sealed into the sealing resin such that at least a part ofits lower surface is exposed from a lower surface of the sealing resin,the lower surface of the lead being a substantially flat surface, adifference of elevation due to coining processing from a side of anupper surface of the lead occurring between the upper surface of thelead and an upper surface of the support; and the sealing resin forsealing the lead frame and the semiconductor chip such that the lowersurface of the lead is exposed.